1. Field of the Invention
The present invention relates to an active matrix panel, and more particularly to an active matrix panel which has two thin film transistors in each pixel.
2. Description of the Related Art
An active matrix panel in a liquid crystal display is formed with thin film transistors connected to both lines near each intersection of the scanning lines and data lines arranged in a matrix form as well as connected to the pixel (short for “picture element”) electrodes of each thin film transistor. In such an active matrix panel, in order to substantially decrease the current flow in an “OFF” state without reducing the current flow in an “ON” state of the thin film transistors, there are some configured with two thin film transistors horizontally connected in series near each intersection point of the scanning lines and data lines arranged in matrix form, for example, as disclosed in Japanese Laid-Open Patent Application (Kokai) No. JP S58-171860 A (Showa 58-1983) titled “THIN FILM TRANSISTOR” (FIG. 6(a)).
Incidentally, in the above-stated conventional prior art active matrix panel example, since two thin film transistors are formed in a series connection simply in the horizontal direction only near each intersection point of the scanning lines and data lines arranged in matrix form, the amount of horizontal layout space occupied by the two side-by-side thin film transistors becomes larger. As a result, this becomes an obstacle when the pixel pitch (pixel spacing) is reduced or the pixel matrix open area ratio becomes narrower.
Consequently, the primary object of the present invention is to provide an active matrix panel which reduces the layout space occupied in the horizontal direction of the above-stated two thin film transistor configuration.
The present invention has been developed to achieve the above object by furnishing a plurality of scanning lines; a plurality of data lines; and a plurality of switching elements which are individually connected to the scanning lines and the data lines; the switching elements respectively comprising a semiconductor thin film which includes a common source-drain region having a bend portion with a channel region on one end and the other end further followed by a second source region of the channel region sequentially formed to one end of the common source-drain region and a second drain region of the channel region sequentially formed to the other end of the common source-drain which is connected to one of the data lines;••a gate insulating film arranged on a surface of the semiconductor thin film; and a gate electrode arranged in areas on the gate insulating film corresponding to the channel region upper part for the second source region and the second drain region which is connected to one of the scanning lines.
The above and further objects and novel features of the present invention will more fully appear from the following detailed description when the same is read in conjunction with the accompanying drawings. It is to be expressly understood, however, that the drawings are for the purpose of illustration only and are not intended as a definition of the limits of the invention.